A liquid crystal display (referred to as an LCD hereinafter) is one of the most widely used flat panel displays at present. The LCD generally includes two substrates having a plurality of electrodes for generating electric field formed thereon, a liquid crystal layer interposed between the substrates and polarizers for polarizing light attached to outer surfaces of the respective substrates. The brightness of light from the LCD is controlled by applying voltages to the electrodes to rearrange liquid crystal molecules. A plurality of switching devices such as thin film transistors (referred to as TFTs hereinafter), connected to the electrodes, for switching the voltages applied to the electrodes are provided on one of the substrates.
The LCDs include driving units having source driving units and gate driving units and a controller for controlling the driving circuits to supply voltages for the electrodes through the switching devices. In general, the controller is provided external to the substrates, and the driving circuits are placed either within or external to the substrate.
FIG. 1 is a block diagram of one configuration 1 of an output buffer for buffering applied voltages which are supplied to an LCD, according to the Background Art. In FIG. 1, the output buffer is implemented as N rail-to-rail (R2R) amplifiers 102 that each handle one bit of the N bit data being buffered in parallel by the output buffer. Though the R2R amplifier 102 implementation of FIG. 1 exhibits good output slew rates, it has problems that include: sinking large amounts of current; and consuming large areas of the substrate upon source driving unit formed, i.e., a big footprint.
FIG. 2 is a block diagram of another configuration of the output buffer, according to the Background Art, which attempts to improve upon the implementation of FIG. 1. In FIG. 2, rather than using N total R2R amplifiers 102 (as in FIG. 1), the output buffer is implemented so as to include a plurality of amplifying circuits 202 and a controller 208. Each amplifying circuit 202 includes: a 1-bit op-amp using P-type transistors (P-type op amp) 204; and a 1-bit op-amp formed of N-type transistors (N-type op-amp) 206.
As is known, to better avoid degrading the liquid crystal material in the LCD, a signal provided by the output buffer should oscillate around a common voltage, Vcom, e.g., Vcom=½ VDD, rather than be substantially constant. The P-type op-amp 204 handles the positive polarity portion of such an oscillating signal and the N-type op-amp 206 handles the negative polarity portion of such an oscillating signal. The outputs of the op-amps 204 and 206 are connected together. The controller 208 controls the op-amps 204 and 206 to alternate as follows: when the P-type op-amp 204 is on, the N-type op-amp 206 is off; and vice-versa.
The controller 208 turns on/off the op-amps 204 and 206 in response to a control signal CTL-H and a control signal CTL-L. The controller 208 generates the controls signals CTL-H and CTL-L based upon a polarity signal, POL generated by a timing controller (not shown) that is indicative of the polarity of the data passing through the output buffer.
FIGS. 3A-3F are timing diagrams for the output buffer implementation of FIG. 2, according to the Background Art. FIG. 3A is a waveform representing an output enable signal, e.g., which can be generated by the timing controller. FIG. 3B is a waveform representing the polarity signal, POL. FIGS. 3C and 3D are waveforms of the CTL-H signal (see FIG. 2) and the CTL-L signal (see FIG. 2), respectively, from the controller 208. FIG. 3E is a waveform (VH_PART; (see FIG. 2)) representing the output of the P-type op-amp 204. And FIG. 3F is a waveform (VL_PART; (see FIG. 2)) representing the output of the N-type op-amp 206.
Inspection of FIGS. 3C and 3E reveals that the VH_PART waveform tracks the CTL-H signal. Similarly, inspection of FIGS. 3D and 3F reveals that the VL_PART waveform tracks the CTL-L signal. But the tracking is not good: the VH_PART waveform (FIG. 3E) has a slow rising-time, as indicated by a reference number 302; and the VL_PART waveform (FIG. 3F) has a slow falling-time, as indicated by a reference number 304.
Slow rising/falling times produced by an output buffer are generally not desirable because, e.g., blurring of dynamic images on the LCD is proportional to slowness of rising/falling times. Thus, it is desirable to provide a high slew rate amplifying circuit for a TFT-LCD system.